Field of the Invention
Embodiments of the present invention relate generally to integrated circuits and, more specifically, to a via pattern to reduce crosstalk between differential signal pairs.
Description of the Related Art
A conventional data connector, such as a peripheral component interconnect express (PCIe) interconnect, couples together different portions of computing devices to allow those portions to communicate with one another. For example, a central processing unit (CPU) within a computing device could be coupled to a graphics processing unit (GPU) within the computing device via a PCIe interconnect. Conventional data connectors typically implement differential signaling techniques, whereby pairs of wires transport complementary signals.
One difficulty with implementing differential signaling, especially in more complex data connectors, is that the different pairs of wires within the connector may induce crosstalk with one another. Crosstalk is undesirable in data connectors because excessive crosstalk can degrade the differential signals and decrease performance. Specifically, crosstalk can increase signal noise, which, in turn, limits data rates. One technique for reducing crosstalk involves spacing differential signal pairs sufficiently far apart to ensure that noise introduced by crosstalk is reduced to acceptable levels. However, with high-throughput data connectors, the space required to ensure acceptable noise levels would result in a data connector size that is too large and difficult or infeasible to manufacture.
As the foregoing illustrates, what is needed in the art is a more effective way to reduce crosstalk in differential signal pairs.